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Rok Krajnc

rkrajnc

Slovenia
Member
00004239
Commits
447
Repos
10
Lines of code (LOC)
155807
2
Overview
10 repos
Last updated: 2018/04/09 — 15:04:00
3
Languages
10 repos
Last updated: 2018/04/09 — 15:04:00
Verilog
 
Commits:
434
LOC:
93022
C
 
Commits:
241
LOC:
49675
Assembly
 
Commits:
192
LOC:
7801
Python
 
Commits:
144
LOC:
1980
Shell
 
Commits:
21
LOC:
116
DOS Batch
 
Commits:
12
LOC:
23
4
Technologies
10 repos
Last updated: 2018/04/09 — 15:04:00
Image Processing
16 commits
5
Code
10 repos
Last updated: 2018/04/09 — 15:04:00
Repository facts
#
Repository
Commits
Team
Language
Tech
Timeline
1
325
1
Verilog
2
170
3
Verilog
PIL
4
13
1
Verilog
5
11
1
Verilog
6
10
3
Verilog
8
3
6
Verilog
9
2
1
Python
10
1
1
Verilog
All
repositories
Avg
Commits
Avg
Team size
Average
57
2
6
Fun facts
10 repos
Last updated: 2018/04/09 — 15:04:00

I'm most productive on

Mondays
14% of users
Mo

I'm most productive at

evenings
49% of users
e

I prefer

snake_case

for naming variables

I prefer

tabs

for indentation

I prefer

list comprehensions