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Rok Krajnc

rkrajnc

Slovenia
Member:
00004239
Commits:
447
Repos:
10
Lines of code (LOC):
155807
2
Overview
10 repos
Last updated: 2018/04/09 — 15:04:00
3
Languages
10 repos
Last updated: 2018/04/09 — 15:04:00
Verilog
 
Commits:
434
LOC:
93022
C
 
Commits:
241
LOC:
49675
Assembly
 
Commits:
192
LOC:
7801
Python
 
Commits:
144
LOC:
1980
Shell
 
Commits:
21
LOC:
116
dosbatch
 
Commits:
12
LOC:
23
5
Code
10 repos
Last updated: 2018/04/09 — 15:04:00
Repository facts
#
Repository
Commits
Team size
Language
Tech
Timeline
1
325
1
Verilog
2011/12 – 2012/11
2
170
3
Verilog
PIL
2011/12 – 2014/11
3
20
1
Verilog
2012/10 – 2013/01
4
13
1
Verilog
2016/04 – 2016/07
5
11
1
Verilog
2011/07 – 2011/08
6
10
3
Verilog
2011/12 – 2016/02
7
7
1
Verilog
2012/10 – 2015/05
8
3
6
Verilog
2013/01 – 2013/02
9
2
1
Python
2012/12 – 2012/12
10
1
1
Verilog
2013/05 – 2013/05
All repositories
Avg
Commits
Avg
Team size
Average
57
2
6
Did you know
10 repos
Last updated: 2018/04/09 — 15:04:00
Fun facts
I commit my code at evening
My most productive days are Mondays
I mostly use snake_case over CamelCase for naming variables
I prefer tabs over spaces
I like list comprehensions in python